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 THEME A01
EXPLORATORY STUDY OF INTEL oneAPI
Intel has recently released a Unified, Standards-Based Programming Model called oneAPI
Modern workload diversity necessitates the need for architectural diversity; no single architecture is best for every workload. A mix of scalar, vector, matrix, and spatial (SVMS) architectures deployed in CPU, GPU, AI, FPGA, and other accelerators is required to extract high performance.
Intel oneAPI products will deliver the tools needed to deploy applications and solutions across SVMS architectures. Its set of complementary toolkits—a base kit and specialty add-ons—simplify programming and help developers improve efficiency and innovation.
Student task: by using oneAPI, try a simple program like matrix multiplication on 3 different platforms: multicore, GPU, FPGA;
collect performance results; write a very short report that comments the work done.
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| THEME A02
FPGA PROJECT
USE one of the available FPGA project to implement a Blocked Matrix Multiplication.
Set matrix size MS and block size BS (e.g., MS=64,128,246 and BS=8,16) and compare the execution time with a multicore execution.
We have several FPGA boards available (ZYBO, VIRTEX ML605, ZYNQ ZC-706, PARALLELA): choose one of them.
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| THEME A03
FPGA PROJECT
USE one of the available FPGA project to implement a Blocked Matrix Multiplication.
Set matrix size MS and block size BS (e.g., MS=64,128,246 and BS=8,16) and compare the execution time with a multicore execution.
We have several FPGA boards available (ZYBO, VIRTEX ML605, ZYNQ ZC-706, PARALLELA): choose one of them.
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| THEME A04
FFT ON MAXELER MAX2C BOARD
Referring to the book [1], Chapter-3, re-implement on the MAX2C board of our lab223 the FFT algorithm and verify the results.
REFERENCES
[1] M. Milutinovic, J. Salom, N. Trifunovic, R. Giorgi, "Guide to DataFlow Supercomputing", Springer, Berlin, DE, Apr 2015, pp. 1-127
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