— Piazza del Campo, Siena, Italy
01 — Biography
02 — Teaching
- 2020/2021:
Architettura dei Calcolatori
- 2021/2022:
Architettura dei Calcolatori
03 — Publication's
International and National Journals
A. Filgueras, M. Vidal, M. Mateu, D. JimÃnez-González, C. Ãlvarez, X. Martorell, E. AyguadÃ, D. Theodoropoulos, D. Pnevmatikatos, P. Gai, S. Garzarella, D. Oro, J. Hernando, N. Bettin, A. Pomella, M. Procaccini, R. Giorgi
The AXIOM Project: IoT on Heterogeneous Embedded PlatformsIEEE Design and Test, 11/2019
R. Giorgi, F. Khalili, M. Procaccini
Translating Timing into an Architecture: the Synergy of COTSon and HLS (Domain Expertise: Designing a Computer Architecture via HLS)Int.l Journal of Reconfigurable Computing, London, UK, 2 Sept.2 2019, pp. 1-18
International and National Conference Proceeding
R. Giorgi, M. Procaccini, A. Sahebi
DRT: A Lightweight Runtime for Developing Benchmarks for a Dataflow Execution Model34th GI/ITG International Conference on Architecture of Computing Systems (ARCS) June.7 2021
R. Giorgi, M. Procaccini
Bridging a Data-Flow Execution Model to a Simple Programming ModelIEEE Proc. of the Int.l Conf. on High Performance Computing and Simulation (HPCS), Dublin, Ireland, July 2019, pp. 165-168
R. Giorgi, M. Procaccini, F. Khalili
AXIOM: A scalable, efficient and reconfigurable embedded platform2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 480-485
R. Giorgi, M. Procaccini, F. Khalili
A Design Space Exploration Tool Set for Future 1K-core High-Performance ComputersACM Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), Valencia, Spain, Jan. 2019, pp. 1-6
R. Giorgi, M. Procaccini, F. Khalili
Analyzing the Impact of Operating System Activity of different Linux Distributions in a Distributed EnvironmentIEEE Euromicro Int.l Conf. on Parallel, Distributed, and Network-Based Processing, Pavia, Italy, Feb. 2019, pp. 422-429
R. Giorgi, M. Procaccini, F. Khalili
Energy efficiency exploration on the zynq ultrascale+IEEE Proc. 30th Int.l Conf. on Microelectronics (ICM), Sousse, Tunisia, Dec. 2018, pp. 52-55
Poster Papers
M. Procaccini, R. Giorgi
An Extended Tracing System for the COTSon SimulatorHiPEAC ACACES-2020, Fiuggi, Italy, July 2020, (poster)
M. Procaccini, R. Giorgi
x86_64 vs Aarch64 Performance Validation with COTSonHiPEAC ACACES-2019, Fiuggi, Italy, July 2019, pp. 261-264, (poster).
R. Giorgi, F. Khalili, M. Procaccini
An FPGA-based Scalable Hardware Scheduler for Data-Flow ModelsInt.l workshop on FPGAS for Domain Experts (FPODE), Limassol, Cyprus, Nov. 2018, pp. 1-1, (poster).
M. Procaccini, R. Giorgi
An FPGA-based Scalable Hardware Scheduler for Data-Flow ModelsHiPEAC ACACES-2018, Fiuggi, Italy, July 2018, pp. 1-4, (poster).
R. Giorgi, M. Procaccini, F. Khalili
Reconfigurable Logic Interface Architecture for CPU-FPGA AcceleratorsHiPEAC ACACES-2018, Fiuggi, Italy, July 2018, pp. 1-4, (poster).
M. Procaccini, R. Giorgi
Simulation infrastructure for the next kilo x86-64 ChipsHiPEAC ACACES-2017, Fiuggi, Italy, Julyy 2017, pp. 91-94, (poster).
PhD. Thesis
M. Procaccini
A Data-Flow Execution Engine for Scalable Embedded ComputingPhD. Thesis, Siena January 2020
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