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 THEME A01
SAMPLER VALIDATION
Test the different samplers provided by COTSon: 'simple', 'no_timing', 'dynamic', 'smarts', 'interval'.
Use the SPEC-2000 benchmarks or alternatively the SPEC-2006 benchmarks.
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| THEME A02
FPGA PROJECT
USE one of the available FPGA project to implement a Blocked Matrix Multiplication.
Set matrix size MS and block size BS (e.g., MS=64,128,246 and BS=8,16) and compare the execution time with a multicore execution.
We have several FPGA boards available (ZYBO, VIRTEX ML605, ZYNQ ZC-706, PARALLELA): choose one of them.
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| THEME A03
IMPLEMENTING A NUMERICAL ALGORITHM for the MAXELER APP GALLERY (+ interniship at Maxeler if successful)
Select a numerical problem (from the book indicated by prof. Milutinovic) and implement a new app which is not yet present in the MAXELER app gallery ( http://appgallery.maxeler.com/ ).
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| THEME A04
FFT ON MAXELER MAX2C BOARD
Referring to the book [1], Chapter-3, re-implement on the MAX2C board of our lab223 the FFT algorithm and verify the results.
REFERENCES
[1] M. Milutinovic, J. Salom, N. Trifunovic, R. Giorgi, "Guide to DataFlow Supercomputing", Springer, Berlin, DE, Apr 2015, pp. 1-127
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