Università degli Studi di Siena
Department of Information Engineering and Mathematics (DIISM)
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High Performance Computer Architecture 2015-2016
 
 
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COURSE SCHEDULE (TENTATIVE): THE FOLLOWING DATES ARE INDICATIVE AND RELATED TO THE HYPOTHETIC REGULAR PROGRESS OF THE LESSONS. NOTE (THIS HAS BEEN ASKED TO ME ...) THE NUMBERING OF LESSON REFERS ONLY TO THE TOPIC, IT DOES NOT IMPLY BY ANY MEANS THAT THE LESSONS WILL BE GIVEN IN A CERTAIN ORDER.

NOTE: the actual schedule will be updated weekly.

BIBLIOGRAPHIC REFERENCES:
  • M. Dubois, M. Annavaram, P. Stenstrom, "Parallel Computer Organization and Design", Cambridge University Press, 2012, ISBN: 978-0-521-88675-8

 LESSON #01 of 01-Oct-2015 (10:00-13:00)
Introduction, Evaluating Computers (PART A)
Dubois Chap. 1,3.3
(Hennessy-Patterson-4 - 2.1,2.2)
(Hennessy-Patterson-5 - 3.1,3.2)
 LESSON #01 of 02-Oct-2015 (14:00-17:00)
Introduction, Evaluating Computers (PART B)
 LESSON #02 of 08-Oct-2015 (10:00-12:00)
Dynamic Instruction Scheduling
Dubois Chap. 3.4,3.4.1
(Hennessy-Patterson-4 - 2.4,2.5)
(Hennessy-Patterson-5 - 3.4,3.5)
  • An Efficient Algorithm for Exploiting Multiple Arithmetic Units
  • tomasulo.c
  •  PRACTICING/LAB #03 of 08-Oct-2015 (02:00-03:00)
    Dynamic Scheduling exercize. (PART A)
  • Exercize from a previous test (23/6/2005).
  •  PRACTICING/LAB #90 of 09-Oct-2015 (14:00-17:00)
    Introduction to Linux (PART A)
     LESSON #03 of 15-Oct-2015 (10:00-12:00)
    Branch Prediction: speculation of branch condition and branch target, BPRED, BTB.
    Dubois - 3.3.4,3.4.3
    (Hennessy-Patterson-4 - 2.3)
    (Hennessy-Patterson-5 - 3.3)
  • Paper [Yeh, Patt - 1992]
  • Paper [Nair - 1995]
  • Paper [Young - 1995]
  •  LESSON #04 of 15-Oct-2015 (02:00-03:00)
    Predictor types, Bimodal, BHSR, BHT, PHT, 2-level adaptive, GAg, PAg, PAs. Other predictors (gshare, gselect, tournament).
  • Paper [McFarling - 1993]
  •  LESSON #05 of 16-Oct-2015 (14:00-17:00)
    Introduction to Superscalar Processors: general scheme and Renaming.
    Dubois 3.3.3,3.4.6(Hennessy-Patterson-4 - 2.6-2.9)
    (Hennessy-Patterson-5 - 3.6-3.10)
    Educational Simulator FreeSs
     from 22-Oct-2015 to 23-Oct-2015: No Lesson
    NO LESSON
     LESSON #06 of 29-Oct-2015 (9:00-11:00)
    Superscalar execution example: Re-Order Buffer and Instruction Window. Case studies: MIPS, Alpha, AMD, Intel, ARM.
    Dubois 3.4.4,3.4.5,3.4.7,3.4.8,3.4.9
  • Exam of 28/6/2007
  • Output of the educational simulator FreeSS
  •  LESSON #08 of 29-Oct-2015 (02:00-04:00)
    Software methods to extract Instruction Level Parallelsim. (PART A)
  • Exam of 28/06/2007 and solution
  • Dubois 3.3.5,3.5,3.5.1-5 (see also Hennessy-Patterson-4 2.7-2.8)
  •  PRACTICING/LAB #01 of 30-Oct-2015 (14:00-16:00)
    Introducing the framework for performance estimation through COTSon
  • COTSON USER GUIDE
  •  PRACTICING/LAB #11 of 30-Oct-2015 (02:00-04:00)
    Exercizes on SUPERSCALAR AND VLIW processors
  • Exam of 07/07/2009 and solution
  • SS-EX1.pdf
  • Exam of 30/06/2008 and solution
  •  PRACTICING/LAB #12 of 05-Nov-2015 (10:00-13:00)
    Exercizes on branch prediction and verious excercizes
  • Exam of 16/01/2012
  • Exam of 07/11/2014 and solution
  • Exam of 22/06/2015 and solution
  •  06-Nov-2015 - MIDTERM TEST (14:00-18:00)

     LESSON #11 of 12-Nov-2015 (10:00-11:00)
    Introduction to multiprocessor systems, Flynn's taxonomy, UMA, NUMA, COMA systems, programming models
    Dubois 5.1,5.4 (see also Culler-Singh, Cap.1).
     LESSON #12 of 12-Nov-2015 (01:00-03:00)
    Coherence Protocols: Write Update, Write Invalidate, Hybrid. Snoopy based protocols: the MESI and DRAGON protocols (PART A)
    Dubois 5.4,5.5,7.3 (see also Culler-Singh, Cap.5).
     LESSON #12 of 13-Nov-2015 (14:00-15:00)
    Coherence Protocols: Write Update, Write Invalidate, Hybrid. Snoopy based protocols: the MESI and DRAGON protocols (PART B)
     LESSON #60 of 13-Nov-2015 (01:00-03:00)
    Introduction to FPGAs (by Somnath Mazumdar)
     LESSON #61 of 19-Nov-2015 (10:00-11:00)
    Introduction to a dataflow parallel programming model - Seminar by Prof. Milutinovic
     LESSON #62 of 19-Nov-2015 (01:00-04:00)
    Dataflow Programming Elements
    Support material.
     PRACTICING/LAB #10 of 20-Nov-2015 (14:00-18:00)
    Programming examples of dataflow programming on MAXELER platform
  • MAXELER website
  •  LESSON #14 of 26-Nov-2015 (10:00-12:00)
    Memory Consistency Models: Sequential Consistency and Relaxed Consistency
    Dubois 7.4,7.5,7.6,7.7 (v. Culler-Singh, cap. 5.2, 5.5)
  • Litmus Tests for checking Memory Models
  •  LESSON #15 of 26-Nov-2015 (02:00-03:00)
    Introduction to Parallel Programming
     LESSON #16 of 27-Nov-2015 (14:00-16:00)
    Parallelsim and Performance
     PRACTICING/LAB #06 of 27-Nov-2015 (02:00-03:00)
    Experimenting several programming models: Pthreads, OpenMP, TBB, Cilk
  • Source code of the examples in Pthreads, OpenMP, TBB, Cilk
  •  LESSON #21 of 03-Dec-2015 (10:00-11:00)
    Introduction to CUDA parallel programming model
  • Bill Dally @ SC-2010
  •  LESSON #22 of 03-Dec-2015 (01:00-02:00)
    CUDA Programming Elements
     LESSON #23 of 03-Dec-2015 (02:00-03:00)
    Atomic Constructs and Threads in CUDA
     LESSON #24 of 04-Dec-2015 (14:00-15:00)
    CUDA Memory Model
     PRACTICING/LAB #08 of 04-Dec-2015 (01:00-03:00)
     LESSON #30 of 10-Dec-2015 (10:00-11:00)
    Clusters
     LESSON #40 of 10-Dec-2015 (01:00-02:00)
    Introduction to MPI
    Dubois 5.2.2, 5.3
     LESSON #50 of 10-Dec-2015 (02:00-03:00)
    Xeon Phi
     PRACTICING/LAB #17 of 11-Dec-2015 (14:00-16:00)
     PRACTICING/LAB #09 of 11-Dec-2015 (02:00-03:00)
    Programming examples of Intel Xeon Phi platform
    SGEMM
     PRACTICING/LAB #10 of 16-Dec-2015 (11:00-13:00)
    Various exercizes from previous exams.
     PRACTICING/LAB #03 of 17-Dec-2015 (10:00-13:00)
    Exercizes on Coherency from past exams.
  • Exercize from 1st exercize from exam of 31/01/2011 and 3rd exercize from exam of 07/07/2009.
  •  18-Dec-2015 - FINAL TEST (14:00-18:00)

     from 24-Dec-2015 to 01-Jan-2016: No Lesson
    VACANZA/PONTE





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